The present invention relates to a system for monitoring PCM transmission channels employing parity bits.
Generally, in order to assure communication at a high operating ratio in signal transmissions, switching is effected between active and standby channels upon the occurrence of a fault in a transmission path. In PCM signal transmissions, a bit error of a received PCM signal is monitored to detect such a fault.
One of the systems for monitoring such a bit error is a parity check system. according to this monitoring system, on the transmitter side, a PCM signal pulse train to be transmitted is divided into appropriate monitoring sections (each being an interval corresponding to k time slots; k being a positive integer equal to or greater than 2--for example, 510), and information obtained by counting the number of marks or spaces of the PCM signal in each section is added to the PCM signal to transmit as a parity bit for each monitoring section. On the receiver side, the number of marks or spaces of the received PCM signal in the corresponding monitoring section is calculated and compared with the information carried by the received parity bit to confirm whether or not a bit error has occurred in that monitoring section of the PCM signal. This monitoring system has the advantages that monitoring of all the PCM signals to be transmitted can be effected with a relatively simple construction, the precision of monitoring is high, and the time required for the detection of a bit error is short. Where a larger number of errors than can be checked by a parity bit or parity bits assigned to one monitoring section have occurred, it becomes impossible to precisely detect the number of bit errors according to this monitoring system. However, if one parity bit is provided, for example, for several hundreds of PCM pulses, then monitoring for a bit error which may arise at a rate lower than one bit to several hundreds of bits can be effected with sufficiently high precision. Accordingly, this system is attractive for channel monitoring.
For details of some examples of this monitoring system, reference is made to the following literature:
(1) M. A. Rich and J. M. Trecker, "The T4M Digital Line Termination," Proceedings of International Conference On Communications, Volume III-48, 1975, pages 48-10 to 48-12.
(2) H. I. Maunsell and C. A. von Roesgen, "The M13 and M34 Digital Multiplexes, "Proceedings Of International Conference On Communications, Volume III-48, 1975, pages 48-5 to 48-9.
(3) K. Nakagawa et al., "W-40G Code Converters," Review of The Electrical Communication Laboratories, NTT, Japan, Volume 23, Nos. 7-8, July-August 1975, pages 799-817.
However, if this monitoring system is applied to a carrier wave differential phase modulation transmission system, a signal error in a transmission path will cause a bit error in each of the two signals pertinent to the error signal on the transmission path because of the differential modulation, resulting in offsetting or cancelling bit errors so that with a monitoring system in which one monitoring section is monitored by means of one parity bit, such a single signal error would become undetectable. Accordingly, in the case where channel monitoring in such a transmission system is effected with a parity check system, it has heretofore been believed that the monitoring must be carried out by providing a plurality of parity bits for one monitoring system, and so monitoring a carrier wave differential phase modulation transmission system with a parity check system had the disadvantages that the signal transmission efficiency was lowered, and the number of constituent elements for composing the parity count section and parity bit multiplex and demultiplex sections in the transmitter and the receiver had to be increased.